Intel Xeon W-3275M processor review
Xeon W-3275M processor released by Intel; release date: 3 Jun 2019. At the time of release, the processor cost $7453. The processor is designed for workstation-computers and based on Cascade Lake microarchitecture.
CPU is unlocked for overclocking. Total number of cores - 28, threads - 56. Maximum CPU clock speed - 4.40 GHz. Maximum operating temperature - 76°C. Manufacturing process technology - 14 nm. Cache size: L1 - 1.75 MB, L2 - 28 MB, L3 - 38.5 MB.
Supported memory types: DDR4-2933. Maximum memory size: 2 TB.
Supported socket types: FCLGA3647. Power consumption (TDP): 205 Watt.
Benchmarks
| PassMark Single thread mark |
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| PassMark CPU mark |
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| Geekbench 4 Single Core |
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| Geekbench 4 Multi-Core |
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| Name | Value |
|---|---|
| PassMark - Single thread mark | 2677 |
| PassMark - CPU mark | 40465 |
| Geekbench 4 - Single Core | 1102 |
| Geekbench 4 - Multi-Core | 17851 |
Specifications (specs)
Essentials |
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| Architecture codename | Cascade Lake |
| Launch date | 3 Jun 2019 |
| Launch price (MSRP) | $7453 |
| Place in performance rating | 565 |
| Processor Number | W-3275M |
| Series | Intel Xeon W Processor |
| Status | Launched |
| Vertical segment | Workstation |
Performance |
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| Base frequency | 2.50 GHz |
| L1 cache | 1.75 MB |
| L2 cache | 28 MB |
| L3 cache | 38.5 MB |
| Manufacturing process technology | 14 nm |
| Maximum core temperature | 76°C |
| Maximum frequency | 4.40 GHz |
| Number of cores | 28 |
| Number of threads | 56 |
| Number of Ultra Path Interconnect (UPI) Links | 0 |
| Unlocked | |
Memory |
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| ECC memory support | |
| Max memory channels | 6 |
| Maximum memory bandwidth | 131.13 GB/s |
| Maximum memory size | 2 TB |
| Supported memory frequency | 2933 MHz |
| Supported memory types | DDR4-2933 |
Compatibility |
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| Package Size | 76.0mm x 56.5mm |
| Sockets supported | FCLGA3647 |
| Thermal Design Power (TDP) | 205 Watt |
Peripherals |
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| Max number of PCIe lanes | 64 |
| PCI Express revision | 3.0 |
| Scalability | 1S Only |
Security & Reliability |
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| Execute Disable Bit (EDB) | |
| Intel® Run Sure Technology | |
| Intel® Trusted Execution technology (TXT) | |
| Mode-based Execute Control (MBE) | |
| Secure Boot | |
Advanced Technologies |
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| Enhanced Intel SpeedStep® technology | |
| Instruction set extensions | Intel AVX-512 |
| Intel 64 | |
| Intel® AES New Instructions | |
| Intel® Hyper-Threading technology | |
| Intel® TSX-NI | |
| Intel® Turbo Boost technology | |
| Intel® Volume Management Device (VMD) | |
| Intel® vPro™ Platform Eligibility | |
| Number of AVX-512 FMA Units | 2 |
| Speed Shift technology | |
Virtualization |
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| Intel® Virtualization Technology (VT-x) | |
| Intel® Virtualization Technology for Directed I/O (VT-d) | |
| Intel® VT-x with Extended Page Tables (EPT) | |
